Innovation Insights: A CTO’s Perspective

Understanding Today’s Semiconductor Industry

Semiconductor Industry|Segment Overview

One key industry that is at the heart of enabling AI is Semiconductors. As I write this newsletter, one company, with a market capitalization of over $4.3 trillion, dominates semiconductor investing news. In fact, NVIDIA, with over a $4.3 trillion market capitalization, represents 7.9 percent of the S&P500 - the most significant weighting for any stock in history. In fact, it has been recently said that NVIDIA earnings announcements are more likely to impact market trajectory than those of the Federal Reserve. Today, many of us think of NVIDIA as the driving force behind AI when in fact, as I will endeavor to explain in this newsletter, the semiconductor industry is a complex global ecosystem made up of highly specialized companies that each play a distinct role in designing, manufacturing, and delivering the chips that power an ever larger and rapidly expanding digital, data driven. ecosystem.

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At the front end of the semiconductor development process are the design and intellectual property (IP) firms, often called "fabless" companies, which focus on creating the architecture of semiconductors such as central processing units (CPUs), graphics processors (GPUs), neural processing units (NPUs), memory, and networking chips. These firms rely on advanced software tools from electronic design automation (EDA) equipment providers to translate concepts into working chip blueprints.

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Semiconductor Industry|Segment Overview

On the manufacturing side, the industry depends heavily on “foundries”, companies that own and operate the multi-billion-dollar fabrication plants (fabs) required to physically produce chips at scale. Supporting them are the equipment and materials suppliers, who deliver the photolithography machines, deposition systems, and specialty chemicals that enable cutting-edge chip production. Once chips are manufactured, assembly, testing, and packaging firms prepare them for integration into devices.

Finally, downstream customers include integrated device manufacturers (IDMs), which design and fabricate their own chips, as well as a vast array of consumer electronics, automotive, industrial, and cloud computing companies that embed semiconductors into their end products.

Together, these players form an interdependent network where innovation and scale are critical, and where leadership in one area (such as design or manufacturing) often dictates global competitiveness. Understanding the unique positioning of each company type within this chain is essential for evaluating opportunities and risks in the sector.

Overall, the semiconductor companies can best be characterized as belonging to multiple specialty markets (CPUs, GPUs, NPUs, Communications & Networking Chips, emerging QPUs, Analog to Digital/ Digital to Analog Converters, and Memory) that each have distinct demand drivers, competitive structures, and profit margin profiles.

Over the past 36 months, AI-driven compute demand has reorganized capital flows and market share, lifted Graphical Processing Units (GPUs) and high-bandwidth memory (HBM) vendors, and prompted significant foundry investments (and national industrial policy responses). At the same time, geopolitical policy (export controls and subsidies) is reshaping where chips are made and who captures margin.

Key takeaways include:

1. NVIDIA remains the pivotal player in AI accelerators (GPU/AI stack); however, there is more to this story if you read on (see details in Appendix 2). 2. Memory oligopolies (Samsung/SK Hynix/Micron) still earn structural rents. 3. Design-only firms capture software-enabled upside while avoiding capital expenditure intensity (ARM Holdings). 4. Integrated device manufacturers and foundries (Intel/TSMC/Samsung) control manufacturing leverage, and therefore influence gross margins, security of supply, and political engagement.

For those interested in taking a deeper dive, the following paragraphs summarize the core applications for each specialty semiconductor market area and highlight three leading vendors chosen for their market share and growth profile.

Semiconductor Industry|Segment Overview

First, the CPUs, or Central Processing Units, provide the traditional general-purpose computing in our PCs, servers, laptops, and mobile devices. In data centers, CPUs handle orchestration, system services, and some model inference; in client devices, they remain the primary compute engine. Recent shifts: Arm architecture and custom designs are gaining share in cloud and mobile due to power efficiency in AI workloads. The top three CPU firms from a market share & growth perspective include:

• Intel still has the most extensive installed base in x86 servers/clients, but is pressured by competition on high-end margins. • AMD has made substantial gains in server & desktop markets with high-core count designs, driving revenue share growth in premium segments. • Arm licensees/Apple (M-series) as an ecosystem and Apple’s custom silicon are growth engines; large cloud players (AWS/Google) and Apple drive Arm momentum.

Next, we have the Graphical Processing Units, GPUs are graphics & AI accelerators that serve as the dominant platform for large-scale AI model training and many inference use cases. GPUs are the primary value driver for data-center AI infrastructure and therefore command outsized revenue and valuation multiples. In the GPU segment, the top three firms include:

• NVIDIA continues to hold a dominant share in data-center GPU training, with a vertically integrated software and hardware stack that captures most AI accelerator economics. (Market share in primary AI GPU segments often cited above ~90%). • AMD has been competitive in certain graphics and growing in data-center accelerators, but has a materially smaller share than the leader, NVIDIA, and • Intel has been pursuing discrete GPUs and AI accelerators. While they have a smaller share today, they are strategically important due to their scale and foundry linkages, as well as their recently announced investment from NVIDIA.

Neural Processing Units (NPUs), also known as AI accelerators, play a crucial role in enabling efficient AI processing on devices such as smartphones, vehicles, and IoT devices. These processors optimize power and reduce latency, critical for AI tasks at the edge. The market for NPUs is rapidly growing as edge computing becomes more prevalent. For NPUs, the top three players include:

1. Apple (Neural Engine) is massive on-device deployment via iPhones/iPads. Apple enjoys strong margins from vertical integration.

2. Qualcomm (Hexagon & AI subsystems) is dominant on the mobile OEM side and has a broad ecosystem reach.

3. NVIDIA/Google/Habana (tied by segment) provide solutions in server/accelerator segments, including Google’s TPUs (cloud), Habana (Intel-backed IP historically), and Nvidia’s inference accelerators. The choice depends on the split between cloud and on-device operations. (See Appendix 2 for more detailed insights in this area)

Semiconductor Industry|Segment Overview

Another key area is the Communications & Networking Chips. These semiconductors underpin data movement within devices and across networks, including switches, routers, optical interconnects, wireless radios, and datacenter interconnects. AI and cloud workloads are bandwidth-hungry, making networking silicon (such as Ethernet, InfiniBand, and optical SerDes) a growth priority. 5G/6G rollouts and hyperscale datacenters are the primary growth drivers. The top three players in this area include:

• Broadcom is the leader in networking Application-Specific Integrated Circuits (ASICs), Ethernet switching, SerDes, and is highly entrenched in the Hyper-Scaler and enterprise markets. They typically enjoy strong margins and are diversified across storage and connectivity. • Marvell Technology is a specialist in data center connectivity, custom ASICs, and optical interconnects, leveraging growth to support AI workloads. • Cisco (via Silicon One) is a networking equipment giant that develops high-performance switching/routing silicon, holding a smaller share as a chip supplier but with a growing presence in hyperscale.

Memory (DRAM, NAND, HBM — high-bandwidth memory)

Primary storage for working datasets (DRAM) and persistent storage (NAND); High Bandwidth Memory (HBM) is critical for GPU/AI accelerators (very high bandwidth, low power). Memory content per server and GPU node has increased significantly with the growth of AI model sizes. The leading three memory chip suppliers include:

• Samsung Electronics has historically been the largest memory supplier across DRAM/NAND. • SK Hynix is the leader in HBM and a fast follower in DRAM. Their aggressive HBM4 efforts signal significant exposure to strong AI. • Micron is the key U.S. player with a strong roadmap in DRAM/NAND and is of strategic importance to the U.S. and Western supply chains.

Analog → Digital (A/D converters, mixed-signal) chips provide the interface between physical world signals and digital processing. They are critical in sensors, medical devices, auto (radar/LiDAR), instrumentation, and comms. These are high-volume, high-margin specialties for analog specialists; often “sticky” due to long design cycles. The three top players here include:

1. Analog Devices is the leader in precision data converters and mixed-signal. (A long-time favorite in Gideon portfolios)

2. Texas Instruments has scale across power management and A/D converters. Additionally, they gain extensive exposure to the automotive and industrial sectors.

3. STMicroelectronics is strong in mixed-signal.

Semiconductor Industry|Segment Overview

Quantum Processing Units (QPUs/quantum chips) — emerging

While these are not technically traditional semiconductors, non-classical computation (such as quantum simulation, chemistry, and optimization) is poised to drive near-term scientific and niche optimization workloads. Longer-term, algorithmic breakthroughs could unlock materially broader markets. Commercial maturity is uncertain, and timelines remain contested. There are a growing number of Quantum players; however, three key standouts include:

1. IBM is focused on superconducting qubits and offers commercial cloud access, along with a clear roadmap. 2. Google is working on superconducting qubits and has a significant research lead with strong academic linkages. 3. IonQ/Rigetti/D-Wave (segment specialists), IonQ (ion-trap), Rigetti (superconducting), and D- Wave (quantum annealing) provide alternate hardware approaches. Leadership depends on the metric (qubit quality vs. commercial deployments).

Semiconductor Industry|Trends

With NVIDIA, what we have seen is that design-only firms can often grow faster, as they enjoy superior free cash flow conversion and avoid the heavy capital expenditures associated with building and operating leading-edge fabrication facilities. Integrated Device Manufacturers (IDMs), such as Intel, and foundries like Taiwan Semiconductor, while strategically essential, have cyclical capital expenditures (capex) and margin profiles tied to wafer fab economics and utilization rates.

While that has been the case in recent years, our review of the market suggests the macro environment is starting to shift for several reasons.

1. OpenAI, along with major tech companies such as Apple, AWS, Google, and Microsoft, is developing its own AI chips to reduce dependence on NVIDIA's GPUs. OpenAI, a significant user of NVIDIA GPUs, is collaborating with Broadcom on a project named "Maia" to create its first in- house chip for both training and inference tasks, aiming for mass production by 2026. The chips, fabricated by TSMC using advanced 3 nm process nodes, are intended for OpenAI’s internal use rather than commercial sale. This strategic shift is detailed further in Appendix 2.

I. Reduce the use of GPUs, which are expensive and in high demand. II. Gain bargaining leverage with chip suppliers by having its own silicon capabilities. III. Improving cost, efficiency, energy use, and performance for generative AI workloads by

customizing hardware to each organization’s specific needs.

Semiconductor Industry|Trends

1. Access to cutting-edge nodes (e.g., 5nm (nano-meter) → 2nm) enables higher transistor density, power efficiency, and therefore superior performance-per-watt, which is a decisive and critical factor in AI, High Performance Compute, and the mobile device markets. Foundries with the best processes and yields command price premiums and a first-mover advantage; thus, investment in leading facilities is critical. 2. Fabrication capacity and lead times = pricing power. When demand outstrips advanced-node wafer capacity, foundries and the customers who secure slots (or vertically integrated IDMs) capture outsized pricing and margin. 3. The political environment and related policy drivers are reshaping industry margins and investment. The U.S. and allied governments have injected large subsidies and incentives to onshore/near-shore advanced semiconductor manufacturing. These funds alleviate capital burdens for fabs built in the U.S. and allied geographies, thereby reducing the total cost of ownership and mitigating some risks for companies that locate capacity closer to end markets. 4. Export controls and strategic decoupling have tightened controls on the export of advanced chips and chip-making equipment — a move intended to limit access to high-end AI computing and advanced nodes. These controls introduce winners and losers: firms and countries inside the allied manufacturing umbrella (and those that secure licenses) retain market access and can preserve high-margin sales; those on the receiving end face technology bottlenecks, hampering local fab upgrades and re-routing markets.

The net effect on margins:

For Fabless/Design firms (e.g., NVIDIA, Qualcomm): Margins remain attractive if they can secure foundry capacity as NVIDIA is doing currently with Intel. But they are exposed to foundry pricing and wafer allocation constraints, and to restrictions that may limit addressable markets (e.g., China).

For IDMs & Foundries: Political support (subsidies) can reduce capex burden and improve long- run margins, provided execution (yield & node leadership) is delivered. Conversely, the cost to build leading-edge fabs is enormous, and missteps (delays, low yields) materially compress margins. The recent public commentary on Intel highlights how capital expenditures (capex) and execution risk impact profitability.

Long Term Investor Bottom line:

While overall industry growth will remain robust, NVIDIA is going to face increasing competition

in the next year from OpenAI and the Hyper-Scalers' alliances with other Semiconductor Design firms. Fabs are the strategic choke point. Where a company sits (design-only vs. IDM vs. foundry) and

which geography its capacity lives in will determine its exposure to policy risk, pricing power, and ultimately sustainable margins over the next decade.

Semiconductor Industry|Trends

Semiconductor Industry Risks & Watchlist (near-term to 24 months)

• Export control changes or relaxations (could open or close market access rapidly). • Foundry capacity shocks with idiosyncratic fabs going offline, unexpected demand surges for HBM/AI DRAM, or yield problems. • Execution at IDMs, where missed node transitions or cost overruns can create persistent margin erosion. , • Technology substitution risk, where specialized accelerators (TPUs, custom ASICs, QPUs) could displace incumbent hardware in specific workloads over the long term.

To summarize, here are a few of the key trends that we suggest for those who follow firms participating in the semiconductor industry watch now:

1. Capacity announcements & CHIPS Act funding disbursements (which fabs will win actual dollars, and how quickly they convert to actual wafer starts at capacity). 2. GPU supply, pricing trends, and inference accelerator competition (NVIDIA pricing power vs. competitor traction – Please see Appendix 2, for additional insights into what each of the Hyper-scalers are doing to develop their unique, differentiated AI Compute and Data Center Architectures) 3. HBM/DRAM supplier results and HBM4 commercialization (As memory revenues expand with demand for AI servers). 4. Export control policy activity (U.S. and allied policy shifts materially change addressable markets, impacting near-term margins and company valuations).

At Gideon, we look forward to engaging with clients and partners interested in this area and are happy to connect with any of you individually to explore areas of specific interest.

Continued…

Appendix 1. Public Company Watchlist By Semiconductors Specialty:

Appendix 2. Architecture & Technology Substitution Risk

In addition to risks associated with fabrication technology architecture, node substitution can have a significant impact on incumbent players. All of the Hyper-scalers are currently looking to diversify away from current high price suppliers while developing differentiated solutions with superior functionality and performance at a lower cost.

To better understand what each of the AI Hyper-scalers (AWS, Microsoft, Google, Apple) is doing today in terms of domain-specific architectures (DSAs) in their data centers, and where they seem to be headed, for those interested, we identify the archetypes of compute that each company uses or is migrating toward and what these imply about broader trends.

Appendix 2. Architecture & Technology Substitution Risk

In addition to risks associated with fabrication technology architecture, node substitution can have a significant impact on incumbent players. All of the Hyperscalers are currently looking to diversify away from current high-price suppliers while developing differentiated solutions with superior functionality and performance at a lower cost.

To better understand what each of the AI Hyper-scalers (AWS, Microsoft, Google, Apple) is doing today in terms of domain-specific architectures (DSAs) in their data centers, and where they seem to be headed, for those interested, we identify the archetypes of compute that each company uses or is migrating toward and what these imply about broader trends.

AWS (Amazon Web Services)

Current Archetypes: 1. General-purpose ARM CPUs — AWS’s Graviton series (Graviton3, now Graviton4) serves many of the traditional “cloud VM / compute / data analytic/general workload” use-cases. 2. Training accelerators — The Trainium family (Trainium, Trainium2) is purpose-built for deep learning training workloads. AWS is utilizing these to scale foundation models, reduce the cost of training, and deliver high aggregate training FLOPS. 3. Inference accelerators — The Inferentia family (Inferentia, Inferentia2) is optimized for inference, especially when customers want lower latency / lower cost per inference (vs GPUs). Inferentia2 adds more memory bandwidth, higher throughput, and lower latency. 4. Custom interconnect and packaging / chiplet-style designs — Trainium2 is described as a system-in-package with compute chiplets, HBM stacks, and connectivity tiles. This reflects the need for mixing specialization (memory, accelerator, connectivity) in a modular fashion.

Where AWS seems to be migrating and pushing toward: • Larger clusters/“ultra-clusters” for massive foundation model training (e.g., projects like “Project Rainer”, etc.) to scale both Trainium (for training) and Inferentia (for inference). • Better support for low-precision and mixed precision formats (FP16, BF16, INT8, maybe FP8) to improve throughput vs power for AI model workloads. This is part of what newer Inferentia2 / Trainium2 are doing. • More custom interconnects/chip-to-chip linking to reduce latency and cost overhead when scaling out inference or training. (e.g., NeuronLink, etc.)

Continued…

Appendix 2. Architecture & Technology Substitution Risk

Microsoft

Current Archetypes:

1. Custom AI accelerators — Microsoft’s Maia 100 is a recent example: a purpose-built accelerator to support both training and inference at scale. It uses high bandwidth memory, vector + tensor units, custom interconnect etc. 2. Custom CPUs for general compute — The Cobalt CPU (ARM-based) is used for general workloads in Microsoft data centers, differentiated by performance/watt considerations. 3. In-house racks/infrastructure chips (DPUs, HSMs, etc.) — Microsoft has also built infrastructure- level chips for server functions (security, network offload, storage, etc.), not just the core AI accelerator + CPU.

Migration/Trajectory:

• Increasing use of DSAs for large language model (LLM) workloads; Maia is advertised as a first- generation AI accelerator for exactly that set of tasks. • Push toward higher memory bandwidth & capacity, lower precision support, and better interconnects (Maia’s interconnect is Ethernet-based with custom protocols for collective operations, such as all-gather and all-to-all) to scale large model inference and training. • Emphasis on energy efficiency/performance per watt, as well as reducing the cost of AI infrastructure. Microsoft is optimizing every layer (chips, racks, cooling, etc.).

Google

Current Archetypes:

1. TPUs (Tensor Processing Units) — Google has multiple generations: TPU v4, TPU v5 (various versions, including “v5e”, “v5p”), Trillium (sixth-gen TPU), and now “Ironwood” (seventh-gen). These are fully custom ASICs optimized for training & inference (especially for large models) , featuring high FLOPS, high-bandwidth memory, and dense interconnects among chips (pods), among other benefits. 2. System-level architectures (“Hypercomputer”, AI Hypercomputer) — These are not just chips, but integrated systems inclusive of network, storage, software stack, and scheduling to orchestrate large-scale training/inference. Google’s approach includes software and runtime optimizations (such as Pathways) to make efficient use of these accelerators. 3. Focus on embedding-heavy workloads — e.g., embedding layers, sparse cores: Google’s recent TPUs include “SparseCores” to better accelerate embedding-heavy workloads inherent in many current large models.

Appendix 2. Architecture & Technology Substitution Risk

Google

Migration/Trajectory:

• Moving toward even larger-scale pods & clusters (TPU v5p pods have thousands of chips, high intra-pod interconnect bandwidth). • Doubling memory per chip/increasing memory bandwidth every generation; supporting more varied precision formats (low precision but still maintaining accuracy) to optimize energy use. • Investing in more flexible interconnect topologies, improved cooling, and more advanced packaging/chiplet or multi-die integration to reduce wiring, latency & power. Google has, in earlier generations, used optical circuit switches for interconnectibility (v4), etc.

Cross-cutting Archetypes & Emerging Trends

From these company-by-company observations, we can infer common archetypes and where things are moving:

Matrix highlights the most direct, high-impact suppliers per Hyper-scaler.

Cross-cutting winners include TSMC, HBM vendors, advanced packaging, EDA, and suppliers of fab and test equipment.

Appendix 2. Architecture & Technology Substitution Risk

Hyperscaler Data Center to Semiconductor Supplier Matrix (Primary & Secondary Beneficiary Analysis)

Source / Publisher Title / Description

Reuters Nvidia CEO to defend AI dominance as competition intensifies

Reuters US tightens its grip on AI chip flows across the globe

Reuters AI Intelligencer: Art of the chip deal

CSIS (Center for Strategic & International Studies) Export Controls and the U.S. Semiconductor Industry (analysis of new U.S. restrictions and policy implications)

Council on Foreign Relations (CFR) Semiconductors and U.S.–China Relations (background on political/geopolitical context)

Credence Research Analog-to-Digital Converters Market Report 2023–2032

SpinQ Technology (Corporate / Press Release) Quantum Computing Processors (QPU) Product Overview

Michigan Journal of Economics The Semiconductor Industry and the Global Supply Chain

Wikipedia United States New Export Controls on Advanced Computing and Semiconductors to China

Semiconductor Industry Newsletter — Appendix Reference Sources

[1] About Amazon — “Follow us into the lab where AWS designs custom chips”

[2] AWS Blog / AWS Insights — “Why purpose-built artificial intelligence chips may be key to your generative AI strategy”

[3] AInvest — “TSMC’s Strategic Dominance in the Global Semiconductor Supply Chain: A Long-Term Investment Thesis”

[4] TSMC Press Release — “TSMC Intends to Expand Its Investment in the United States to US$165 Billion to Power the Future of AI”

[5] Manufacturing Dive — “Intel, Amazon Web Services to partner on AI chips”

[6] Business Wire / Intel — “Intel and AWS Expand Strategic Collaboration, Helping …”

[7] Semiconductors.org — “Emerging Resilience in the Semiconductor Supply Chain”

[8] CSIS (Center for Strategic & International Studies) — “Mapping the Semiconductor Supply Chain: The Critical Role of Indo-Pacific Region”

[9] arXiv — “On Labs and Fabs: Mapping How Alliances, Acquisitions, and Antitrust are Shaping the Frontier AI Industry”

[10] arXiv — “Innovating at Speed and at Scale: A Next Generation Infrastructure for Accelerating Semiconductor Technologies”

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